VHDL Visual Hardware Description Language

用法例句

The mixed design method by schematics and VHDL is used to design the driving circuit in Xilinx ISE 7.

介绍了一种面阵CCD图像传感器VCCD512H,分析了其驱动时序信号,选用复杂可编程逻辑器件(CPLD)作为硬件设计平台,使用原理图和可视化硬件描述语言(VHDL)相结合的方法设计了其驱动时序,针对Xilinx公司的可编程逻辑器件XC9572进行适配,采用EDA软件对所设计的时序进行了仿真。

In particular,high frame rate CA-D6 driving timing is designed and implemented by mixed designing method composed of ECS and VHDL which are input design methods embedded in FPGA/CPLD designing tool ISE.

分析比较了进行时序设计的几种常用方法,着重介绍了如何利用XILINX综合工具ISE的两种输入设计方法VHDL(可视化硬件描述语言)和ECS(原理图编辑器)相结合来设计以及实现高帧频摄像头CA-D6的驱动时序,并给出了时序仿真结果。

Implementation of Viterbi Decoding With Verilog HDL;

用Verilog硬件描述语言实现Viterbi译码

Building of HDL MP3 Decoder′s Test Bench and IP Core Reuse;

基于硬件描述语言的MP3解码器仿真平台的搭建以及IP Core的重用

Designing Digital-Calculagraph By Verilog HDL;

用Verilog硬件描述语言设计数字计时器

This article analyzes the theory of power consumption in digital circuit, writes a power consumption model in gate level using Verilog HDL according to the theory, and applies this model into three different structured adders.

对数字电路中的功耗产生机理进行了分析 ,根据此原理 ,利用 Verilog硬件描述语言编写了一个门级功耗模型 ,并将他应用到 3种不同结构的加法器中 ,分别测量其功耗 ,分析了功耗大小不同的原因。

Then, the thesis gives design details of all the major modules of the JPEG decoder which is implemented using Verilog HDL also with the simulation waveforms and the implementing results after the JPEG decoding algorithm was studied deeply.

采用了Verilog硬件描述语言对JPEG基本模式硬件解码器的各主要模块进行设计实现,并给出了功能仿真波形图及测试结果。

The endpoints controller is designed in Verilog HDL for USB2.

采用Verilog硬件描述语言设计了用于USB2。

CHDL (Computer Hardware Description Language)

计算机硬件描述语言

nonprocedural computer hardware description language

非过程计算机硬件描述语言

An Exploration on the Teaching Reformation of the HDL Course;

“硬件描述语言”课程的教学改革探索

The Status Quo and Development of Several Hardware Description Languages;

几种硬件描述语言HDL的现状与发展

To design waveform pulsing with VHDL Hardware DescriPtion Language;

用VHDL硬件描述语言设计波形发生器

The Research and Development of the Network Courseware for "Verilog HDL Hardware Description Language";

《Verilog HDL硬件描述语言》网络课件研究与开发

Programmable logic devices and EDA way for hardware description language;

可编程逻辑器件及硬件描述语言的EDA方法

The application of hardware description language VHSIC in design of ASIC

硬件描述语言在专用集成电路设计中的应用

On the Synthetically VHDL Hardware Description Language Under the Max+PlusⅡ Software;

基于Max+PlusⅡ平台对VHDL硬件描述语言综合的探讨

A Programmable UART Based on Verilog HDL

基于Verilog硬件描述语言的可编程异步收发器

Advanced Boolean Expression Language is a big breakthrough in the development of the electronics system.

硬件描述语言是当代电子系统发展的一个重大突破。

Research and Implementation of Parallel Logic Simulation System Based on VHDL;

基于硬件描述语言的并行逻辑模拟系统研究与实现

The Investigation of the Combinatory Logic Circuit Design Based on the ABEL-HDL;

基于硬件描述语言ABEL-HDL实现组合逻辑电路的探讨

Resource Models and Hardware Synthesis for System Level Design Language;

资源模型与系统级描述语言的硬件综合

Describing basic logic openration in the digital circuit with hard description

数字电路基本逻辑运算的硬件语言描述与应用

Construction of"Language to Describe"the Teaching of Computer Hardware Platform

构建“类描述语言”的计算机硬件教学平台

A Survey of Software Architecture Description Language ADL;

软件构架描述语言ADL的研究进展

Design and realization of new software requirements description language

一种软件需求描述语言的设计与实现