selforthogonal convolutional code

用法例句

Application of 7/8 self-orthogonal convolutional coding leads to greatly improved bit error performance of broad band wirless access systems.

针对TDMA宽带无线接入系统零星误码的问题,设计了7/8自正交卷积码高效结构的编码器和反馈结构的译码器,7/8自正交卷积码的应用使得宽带无线接入系统的误码性能得到较大改善。

Convolutional Self-Orthogonal Codes and Their Forward-Only Iterative Decoding with Low Complexity

正交卷积码及其低复杂度前向迭代译码技术的研究

The performance, the encoding and decoding method of a orthogonalizable diffuse convolution code are analyzed. The softwaare implementation of this code is explained in details.

分析一种可正交扩散卷积码的性能和编译码方法。详细说明了该码的软件实现。

The Application of Generalized Othogonal Polynomials (GOP) to the Solution of Convolution Integrals

广义正交多项式在卷积求解中的应用

Convolution Code of the Viterbi Decoding FPGA to Achieve

卷积码Viterbi译码的FPGA实现

Concatenated Reed-Solomon Product Code/Convolutional Code with Iterative Decoding

迭代译码的级联Reed-Solomon乘积码与卷积码

A Code-matched Interleaver Design Based On The Low-bound of RSC Parity Weight

一种基于递归系统卷积码校验重量下限的匹配交织器设计方法

Research on Decoding Tech of Convolutional Turbo Codes;

循环卷积Turbo码译码技术研究

The Research of the Logic Algebra Decoding Method of (2, 1, 4) Convolutional Code;

（2，1，4）卷积码的逻辑代数译码方法研究

Construction of Quasi-Cyclic LDPC Block and Convolutional Codes

准循环LDPC分组码和卷积码的构造

Packet decoding method for convolutional codes based on FPGA

基于FPGA的卷积码分组译码方法

VHDL Realization of Encoder and Decoder for Convolutional Code in Communication System

通信系统中卷积码编解码器的VHDL实现

A High-speed viterbi-decoding Scheme for Convolutional Code

卷积码的Viterbi高速译码方案

Decoder Design for Convolutional Code Based on Viterbi Method

基于维特比算法的卷积码译码器设计

Novel decoding of convolutional codes for OCDMA system

基于OCDMA的新型卷积码译码方案

Research on the Hight Efficient Encoding/Decoding Technique for LDPC Codes and Serially Concatenated LDPC/Convolutional Codes;

高效LDPC码及级联LDPC/卷积码编译码的性能研究

The BICM-ID performance research based on convolutional codes,LDPC codes and Turbo codes

基于卷积码、LDPC码、Turbo码的BICM-ID性能的研究

The FPGA Design and Implement of Viterbi Encoder and Decoder for Convolutional Codes

基于FPGA的卷积码Viterbi编码/译码器的设计与实现

self - orthogonal block code

自正交块码, 自正交分组码